The present invention relates to substrates of semiconductor packages, and more particularly, to a substrate which is used for supporting at least a semiconductor chip thereon and on which an encapsulant is formed to encapsulate the semiconductor chip.
During an encapsulation process for a conventional BGA (ball grid array) semiconductor package, an encapsulating resin can be smoothly injected through a runner formed on a mold over a substrate into a cavity of the mold. However, after completing the encapsulation process, removable of the resin in the runner, which is securely adhered to a surface of the substrate corresponding in position to the runner, will usually accompany damage to the semiconductor package due to strong adhesion between the redundant resin and the surface of the substrate corresponding in position to the runner.
Therefore, in order to eliminate the undesirable damage to the semiconductor package, a novel design of the runner is disclosed in U.S. Pat. No. 5,635,671. The runner, as shown in FIGS. 1 and 2, has a long strip copper layer 13 mounted on a core layer 12 of a substrate 10 made of a BT resin, while solder mask 11 is applied to a surface of the core layer 12 in a manner that a groove opening 40 is formed on the copper layer 13 for exposing a surface 15 of the copper layer 13 to the groove opening 40. The exposed surface 15 of the copper layer 13 is then plated with gold to be corresponding in position to the runner during an encapsulation process. Since adhesion between an encapsulating resin and gold is ten times smaller than that between the resin and the substrate, the resin excessively remained over the exposed surface 15 of the copper layer 13 can be easily removed after completion of the encapsulation process. This then eliminates problems of damaging the substrate or the semiconductor package due to strong adhesion as previously recited.
However, as the application of the solder mask 11 usually accompanies a positioning off-set of around 0.075 mm, the copper layer 13 is deliberately formed to be wider than the opening 40 by an 0.075 mm width W at each of two lengthwise sides of the copper layer 13. This is to avoid possible exposure of the core layer 12 beneath the copper layer 13. As shown in the FIG. 2, with accurate positioning of the solder mask 11, the copper layer 13 will be covered by the solder mask 11 in a width of 0.075 mm at each lengthwise side of the copper layer 13.
Further, as the solder mask 11 above the lengthwise sides of the copper layer 13 may be partially bulged due to shrinkage of the solder mask 11 when subjected to heat, as shown in FIG. 2, a mold 60 used in the encapsulation process can only clamp the bulged part of the solder mask 11 which is of a narrow area of around 0.075 mm width, as shown in FIG. 3. This makes clamping force exerted on the substrate 10 by the mold 60 insufficient, and accordingly the encapsulating resin running through the runner 15 tends to leak out from the clamping area between the mold 60 and the bulged part of the solder mask 11, resulting in occurrence of flash indicated by arrow 16 and degradation of quality of products.
A primary objective of the present invention is to provide a substrate of a semiconductor package, in which an encapsulating resin remained in a runner and adhered to a substrate, after an encapsulation process is completed, can be easily removed without damaging the substrate or the semiconductor package itself, and flash of the resin can be prevented from occurrence.
According to the above and other objectives, a substrate of a semiconductor package is proposed in the present invention. The substrate has at least one strip copper layer formed on a core layer of the substrate, while a solder mask is applied to a surface of the core layer in a manner that a groove opening is formed on the copper layer for exposing a portion of the surface of the copper layer to the atmosphere. This exposed surface of the copper layer is then plated with gold. Moreover, the solder mask is arranged to cover two lengthwise sides of the copper layer by a width of between 0.1 mm and 1.0 mm, and most preferably 0.5 mm, so as to allow bulges of the solder mask over the copper layer generated from shrinkage of the solder mask to extend in a direction away from the groove opening, and to prevent resin flash from occurrence.
In another embodiment of the present invention, the two long sides of the copper layer covered by the solder mask are formed with a plurality of projections extending in a direction away from the exposed opening of the copper layer.